ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 1 version: a15 dual n - channel mosfet 30 v, 2 0 a, 20 m features fast switching 100% avalanche tested pb - free plating rohs compliant halogen - free package a pplication power supply motor control key performance parameters p arameter value unit v ds 3 0 v r ds(on) (max) v gs = - 10v 20 m v gs = - 4.5v 3 0 q g 4.1 nc pdfn33 dual dual n - channel mosfet notes: moisture sensitivity level: level 3. p er j - std - 020 absolute m aximum ratings ( t a = 25 c unless otherwise noted ) p arameter s ymbol l im it unit drain - source voltage v ds 3 0 v gate - source voltage v gs 2 0 v continuous drain current (note 1 ) t c = 25 c i d 2 0 a t c = 100 c 13 pulsed drain current (note 2 ) i dm 8 0 a total power dissipation @ t c = 25 c p dtot 20 w single pulsed avalanche en ergy (note 3 ) e as 14 mj single pulsed avalanche current (note 3 ) i as 1 7 a operating junction and storage temperature range t j , t stg - 55 to +1 50 c thermal performance p arameter s ymbol limit unit junction to case thermal resistance r ? jc 6.4 c /w junction to ambient thermal resistance r ? ja 62 c /w notes: r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistances. the case thermal reference is defined at the solder mounting surface of the drain pins. r ? ja is guara nteed by design while r ? ca is determined by the users board design. r ? ja shown below for single device operation on fr - 4 pcb in still air
ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 2 version: a15 electrical specifications ( t a = 25 c unless otherwise noted ) parameter conditions symbol m in t yp m ax u nit static (n ote 4 ) drain - source breakdown voltage v gs = 0 v, i d = 250 a bv dss 3 0 -- -- v gate threshold voltage v ds = v gs , i d = 250a v gs(th) 1. 2 1. 5 2.5 v gate body leakage v gs = 2 0 v, v ds = 0v i gss -- -- 100 na zero gate voltage drain current v ds = 3 0v, v gs = 0v i dss -- -- 1 a v ds = 24 v, t c = 125 oc -- -- 1 0 drain - source on - state resistance v gs = 10v, i d = 10 a r ds(on ) -- 17 20 m gs = 4.5v, i d = 6 a -- 23 30 forward transconductance v ds = 5 v, i d = 6 a g fs -- 13 -- s dynamic (note 5 ) total gate charge v ds = 15 v, i d = 8 a, v gs = 4.5 v q g -- 4.1 -- nc gate - source charge q gs -- 1 -- gate - drain charge q gd -- 2.1 -- input c apacitance v ds = 25 v, v gs = 0v, f = 1.0mhz c iss -- 345 -- pf output capacitance c oss -- 55 -- reverse transfer capacitance c rss -- 32 -- switching (note 6 ) turn - on delay time v dd = 15 v, i d = 1a, r gen = 6 d(on) -- 2.8 -- ns turn - on rise time t r -- 7.2 -- turn - off delay time t d(off) -- 15.8 -- turn - off fall time t f -- 4.6 -- source - drain diode (note 4 ) maximum continuous drain - source diode forward current integral reverse diode in the mosfet i s -- -- 20 a maximum pulse drain - source dio de forward current i s m -- -- 80 a diode - source forward voltage v gs = 0v , i s = 1a v sd -- -- 1 v notes: 1. current limited by package 2. pulse width limited by the m aximum junction temperature 3. l = 0.1 mh, i as = 1 7 a, v dd = 25 v, r g = 25, start ing t j = 25 o c 4. p ulse test: pw 300s , d u ty cycle 2% 5. for design aid only, not subject to production testing. 6. switching time is essentially independent of operating temperature.
ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 3 version: a15 ordering information part no. package packing tsm 200n03dp q33 rgg pdfn33 5k pcs / 13 reel note: 1. compliant to rohs directive 2011/65/eu and in accordance to weee 2002/96/ec 2. halogen - free according to iec 61249 - 2 - 21 definition
ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 4 version: a15 characteristics curves ( t c = 25c unless oth erwise noted) continuous drain current vs. t c normalized r ds(on) vs. t j normalized vth vs. t j gate charge normalized transient impedance maximum safe operation area - i d , continuous drain current (a) t c , case temperature ( c ) t j , junction temperature ( c ) n ormalized on resistance (m ? ) t j , junction temperature ( c ) q g , gate charge ( nc ) normalized gate threshold voltage (v) - v gs , gate to source voltage (v) square wave pulseduration (s) normalized thermal response (r jc ) - i d continuous drain current (a) v ds , drain to source voltage (v)
ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 5 version: a15 package outline dimensions ( unit: millimeters ) pdfn33 dual suggested pad layout ( unit: millimeters ) marking diagram y = year code m = month code for halogen free product o =jan p =feb q =mar r =apr ` s =may t =jun u =jul v =aug w =sep x =oct y =nov z =dec l = lot code (1~9, a~z)
ts m 20 0 n 0 3 d tai wan semiconductor document number: ds_p 0000166 6 version: a15 notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, to any intellectual property rights is granted by this document. except as provided in tscs terms and conditions of sale for such products, tsc assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of tsc products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, cop yright, or other intellectual property right. the products shown herein are not designed for use in medical, life - saving, or life - sustaining applications. customers using or selling these products for use in such applications do so at their own risk and a gree to fully indemnify tsc for any damages resulting from such improper use or sale.
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